Data processing systems in general, and microprocessors in particular, are commonly provided with one or more ports for sensing an interrupt. Interrupts may be provided upon the occurrence of various internal or external events, such as an error or fault condition. Executive level software is generally provided to process or handle interrupts when they occur. Since interrupts, by their nature, are asynchronous with the normal operations of the processor, the processor's state with respect to a current task at the time of an interrupt is indeterminate. Thus, it is common practice to save information regarding the state of the processor as part of the interrupt handling routine. Such state information may include program pointers, general and special register contents and the like. If such state information is not saved, the processor is unable to resume a task upon returning from an interrupt and must be re-initialized.
State saving during interrupt processing necessarily increases the operational overhead of the processor. Frequently, such state saving is unnecessary since the processor may be idle at the time of an interrupt or, due to the nature of the interrupt, may not return to the task it was performing at the time the interrupt occurred. Thus, a reduction in processor overhead can be achieved if state saving is performed selectively as a function of the processor status and/or nature of the interrupt.
Some prior art microprocessors provide flag bits to indicate whether or not certain internal registers have been used since the corresponding flag was reset. If the register or register file associated with a flag has not been used, then the contents of such register(s) need not be saved during interrupt processing. For example, the "CLIPPER" module manufactured by Fairchild Semiconductor includes a bit in a system status word to indicate when a floating point register is "dirty", i.e. has been written. Thus, it is possible to avoid saving the contents of the floating point registers during interrupt processing if they have not been used.
It is also known in the art of multiprocessor systems to provide a flag to indicate when a processor is available or "useable". For example, the R2000 from MIPS Computer Systems, Inc. provides a set of flag bits in a system status register to indicate and control the usability of the four coprocessors in the system.
However, microprocessor systems have not heretofore utilized processor status information to adaptively control interrupt processing so as to reduce operating overhead in the manner described below.